{"title":"PAVLOV: a programmable architecture for volume processing","authors":"K. Kreeger, A. Kaufman","doi":"10.1145/285305.285314","DOIUrl":null,"url":null,"abstract":"We present a purullel 2D mesh connected architecture with SIML) processing elements. The design allows for real-time volume rendering as well as interactive 30 segmentation and .1D feature extraction. Thas zs possible because the SIMD processing elements are programmable, a feature which also ullows the use of many different rendering algorithms. We present an algorithm which, with the addition of hardware re,sources, provides conflict free access to volume slices along any of the three major axes. The volume access conflict bus been the main reason why previous similar architectures could not perform real-time volume rendering. We present the performance of preliminary algorithms on a software simulator of the architecture design. CR Categories: C.1.2 [Processor Architectures]: Mult,iple Data Stream .4rchitectures (Multiprocessors)-Singleirlst,rllc:tion-streanl, multiple-data-stream processors (SIMD) ; 1.3.1 [Computer Graphics]: Hardware ArchitectureGraphics processors, Parallel processing; 1.4.6 [Image Proc.rssillg And Computer Vision]: Segmentation;","PeriodicalId":298241,"journal":{"name":"Proceedings of the ACM SIGGRAPH/EUROGRAPHICS workshop on Graphics hardware","volume":"19 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1998-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"13","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the ACM SIGGRAPH/EUROGRAPHICS workshop on Graphics hardware","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1145/285305.285314","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 13
Abstract
We present a purullel 2D mesh connected architecture with SIML) processing elements. The design allows for real-time volume rendering as well as interactive 30 segmentation and .1D feature extraction. Thas zs possible because the SIMD processing elements are programmable, a feature which also ullows the use of many different rendering algorithms. We present an algorithm which, with the addition of hardware re,sources, provides conflict free access to volume slices along any of the three major axes. The volume access conflict bus been the main reason why previous similar architectures could not perform real-time volume rendering. We present the performance of preliminary algorithms on a software simulator of the architecture design. CR Categories: C.1.2 [Processor Architectures]: Mult,iple Data Stream .4rchitectures (Multiprocessors)-Singleirlst,rllc:tion-streanl, multiple-data-stream processors (SIMD) ; 1.3.1 [Computer Graphics]: Hardware ArchitectureGraphics processors, Parallel processing; 1.4.6 [Image Proc.rssillg And Computer Vision]: Segmentation;