Dual-injection-locked ½ divider with optimized VCO loaded Q and current

Abstract

A new ½ dual-injection locked frequency divider (dual-ILFD) with wide locking range and low-power consumption is proposed and developed together with a divide-by-2 current mode logic (CML) divider. ½ CML divider is connected at the output of ½ dual-ILFD for achieving constant output amplitude. The chip was fabricated using a 0.18-µm BiCMOS process. The ½ dual-ILFD enhances the locking range with low-power consumption through optimized load quality factor (QL) and output current amplitude (iOSC) simultaneously, achieving a locking range of 692 MHz between 7.512 and 8.204 GHz, which is almost 10 times larger than a single-injection counterpart. The core of ½ dual-ILFD consumes 2.93 mA with 1.5 V supply.