Low power mixed analog-digital signal processing

Mattias Duppils, C. Svensson
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引用次数: 6

Abstract

The power consumption of mixed-signal systems featured by an analog front-end, a digital back-end, and with signal processing tasks that can be computed with multiplications and accumulations, is analyzed. An implementation is proposed, composed of switched-capacitor mixed analog/digital multiply-accumulate units in the analog front-end, followed by an A/D converter. This implementation is shown to be superior in respect of power consumption compared to an equivalent implementation with a high-speed A/D converter in the front-end, to execute signal processing tasks that include decimation. The power savings are only due to relaxed requirement on A/D conversion rate, as a direct consequence of the decimation. In a case study of a narrowband FIR filter, realized with four multiply-accumulate units, and with a decimation factor of 100; power saving is 54 times. Implementation details are given, the power consumption, and the thermal noise are analyzed.
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低功耗混合模拟-数字信号处理
分析了以模拟前端、数字后端、信号处理任务可通过乘法和累加计算的混合信号系统的功耗。提出了一种实现方案,在模拟前端由开关电容混合模拟/数字乘累加单元组成,然后是A/D转换器。在执行包括抽取在内的信号处理任务时,与在前端使用高速a /D转换器的等效实现相比,该实现在功耗方面表现优越。节省电力只是由于对A/D转换率的要求放宽,这是抽取的直接结果。以一个窄带FIR滤波器为例,该滤波器由四个乘累加单元实现,抽取系数为100;省电54倍。给出了实现细节,分析了其功耗和热噪声。
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