FPGA Implementation of Turbo Product CODEC

Abstract

Error control coding plays a vital role to maintain data accuracy across noisy channel. Turbo product code is a high performance error correcting code. It can be used in any communication system where a significant power saving is required or operating signal to noise ratio is very poor. This paper presents an implementation of a turbo product CODEC with Reed-Muller (16, 5, 8) as constituent codes. The design has been simulated and synthesized successfully in Xilinx Integrated Software Environment.