Finite-Alphabet Message Passing using only Integer Operations for Highly Parallel LDPC Decoders

Tobias Monsees, D. Wübben, A. Dekorsy, Oliver Griebel, M. Herrmann, N. Wehn
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引用次数: 2

Abstract

In this paper, we present a new design of Finite Alphabet (FA) Message Passing (MP) decoders using only integer operations. We utilize Discrete Density Evolution with a multidimensional Lookup-Table (mLUT) design for Variable Node (VN) updates to consider all input messages jointly for reducing the information loss compared to the frequent sequential LUT design approaches. From this mLUT design, we derive a minimum-integer computation (MIC) decoder that allows for different bit-widths for node operations and message exchanges between nodes. The mLUT operations for VN updates are replaced by low complexity signed integer additions and threshold operations, and the Check Node (CN) updates simplify to a minimum search over integers. For a (816,406) regular LDPC code, we show that our 3-bit MIC decoder achieves the communication performance of the corresponding mLUT decoder and outperforms a 4-bit state-of-the-art Min-Sum (MS) decoder. We show that the node implementations on a 22 nm FD-SOI technology yield an improved area and energy efficiency over the respective MS implementation. To the best of our knowledge, this is the first time that an implementation improvement for the VNs and CNs is shown when using FA MP.
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高度并行LDPC解码器中仅使用整数运算的有限字母消息传递
本文提出了一种仅使用整数运算的有限字母(FA)消息传递(MP)解码器的新设计。我们利用离散密度进化和多维查找表(mLUT)设计来进行可变节点(VN)更新,以联合考虑所有输入消息,以减少与频繁的顺序LUT设计方法相比的信息损失。从这个mLUT设计中,我们得到了一个最小整数计算(MIC)解码器,它允许节点操作和节点之间的消息交换使用不同的位宽。VN更新的mLUT操作被低复杂度的带符号整数加法和阈值操作所取代,并且检查节点(CN)更新简化为对整数的最小搜索。对于(816,406)常规LDPC码,我们表明我们的3位MIC解码器实现了相应的mLUT解码器的通信性能,并且优于最先进的4位最小和(MS)解码器。我们表明,在22 nm FD-SOI技术上的节点实现比各自的MS实现产生了更高的面积和能源效率。据我们所知,这是第一次在使用FA MP时显示VNs和CNs的实现改进。
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