Construction of a multi-level Hierarchical Quasi-Cyclic matrix with layered permutation for partially-parallel LDPC decoders

Vikram Arkalgud Chandrasetty, S. M. Aziz
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引用次数: 4

Abstract

Implementation of partially-parallel (Low-Density Parity-Check) LDPC decoders using unstructured random matrices is very complex and requires huge hardware resources. To alleviate the complexity and minimize resource requirements, structured LDPC matrices are used. This paper presents a novel technique for constructing a multi-level Hierarchical Quasi-Cyclic (HQC) structured matrix for LDPC decoders. A unique multi-level structure of the proposed matrix provides flexibility in generating different code lengths and code rates for various applications such as WiMAX, WLAN and DVB-S2. In addition, different combinations of permuted sub-matrices are inserted in layers, to provide virtual randomness in the LDPC matrix. Simulations results show that the HQC matrices generated using the proposed technique have a marginal loss of less than 0.1 dB at a bit error rate (BER) performance of 10−5, compared to unstructured random matrices. The proposed matrix therefore provides BER performance close to random matrices while significantly reducing hardware resource requirements.
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部分并行LDPC译码器的多层分层排列拟循环矩阵的构造
使用非结构化随机矩阵实现部分并行(低密度奇偶校验)LDPC解码器非常复杂,需要大量的硬件资源。为了减轻复杂性和最小化资源需求,使用结构化LDPC矩阵。本文提出了一种用于LDPC解码器的多层分层拟循环(HQC)结构矩阵的构造方法。该矩阵具有独特的多级结构,可灵活地为WiMAX、WLAN和DVB-S2等各种应用生成不同的码长和码率。此外,在层中插入不同排列子矩阵的组合,以提供LDPC矩阵的虚拟随机性。仿真结果表明,与非结构化随机矩阵相比,使用该技术生成的HQC矩阵在误码率(BER)为10−5的情况下,边际损耗小于0.1 dB。因此,所提出的矩阵提供了接近随机矩阵的误码率性能,同时显著降低了硬件资源需求。
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