An analog front end design for GSPS oscilloscope

Abstract

The analog front end circuit is an important part of the digital storage oscilloscope. This paper designs a wide band, low noise and high input impedance analog front end circuit. It includes high impedance buffer, single-ended-to-differential conversion, DC offset adjustment, variable gain amplifier and low noise power modules. We used a high-impedance passive probe with this circuit to perform a deep performance test, which contains time and frequency domain. The test results show that it can be well matched with general probe. The front end system has good performance. The bandwidth reaches about 500 MHz and the noise floor RMS voltage is 5.1 mV. The bandwidth and noise floor can meet the GSPS sampling rate and 8-bit vertical resolution digital oscilloscope requirements.