Noise Resistant Full Adder Using DNA Strands

Soha Boroojerdi, A. Jahanian, E. Rohani
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Abstract

A DNA computer requires DNA processor. A fundamental component of the processor is an arithmetic logic unit (ALU). The ALU performs all arithmetic operations in binary format, and the most critical operation is two's complement addition, which can involve addition, subtraction, multiplication, and division. Two's complement adders can be synthesized using multiple full adders. In this paper, a noise-resistant DNA computing full adder circuit is presented. The proposed adder circuit, unlike other circuits, takes strands as inputs and produces the results in the form of DNA strands. This is an important characteristic, since it enables multiple-level design. In addition, since all possible hybridization in this circuit is desired, it can control an abundance of unwanted strands. As a result, the synthesized adder is noise-resistant. While other multi-level designs might be possible (e.g., Nor-Nor design), the proposed design implements the full adder circuit as an integrated gate. The benefit of having an integrated circuit is that it eliminates the need for separate suppressors and activators. Before synthesizing the adder, we implemented AND, OR, and inverter gates and then extended these basic components to implement the desired circuit. The proposed designs were implemented and tested using Visual DSD programming and simulation tool.
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使用DNA链的抗噪声全加法器
DNA计算机需要DNA处理器。处理器的一个基本组件是算术逻辑单元(ALU)。ALU以二进制格式执行所有算术运算,其中最关键的运算是2的补加,它可以包括加、减、乘和除。双补加法器可以用多个全加法器合成。本文提出了一种抗噪声DNA计算全加法器电路。所提出的加法器电路与其他电路不同,它以链作为输入,并以DNA链的形式产生结果。这是一个重要的特性,因为它支持多级设计。此外,由于该电路中所有可能的杂交都是需要的,因此它可以控制大量不需要的链。因此,合成的加法器是抗噪声的。虽然其他多级设计可能是可能的(例如,Nor-Nor设计),但所提出的设计将整个加法器电路实现为集成门。集成电路的好处是它不需要单独的抑制器和激活器。在合成加法器之前,我们先实现与门、或门和逆变门,然后扩展这些基本元件来实现所需的电路。利用Visual DSD编程和仿真工具对所提出的设计进行了实现和测试。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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