500 MHz differential latched current comparator for calibration of current steering DAC

Abstract

This paper proposes the design techniques of high performance current comparator which can sense a minimum change of 8 nA for 10 μA input current. The current comparator shows fast response with 0.95 ns delay for an input current difference of 0.1 μA peak-to-peak and it can work up to 500 MHz clock frequency. The use of low impedance trans-impedance stage makes it faster and the preamplifier removes kickback noise. Using latch at the end of comparator provides a faster response. The dynamic comparator is pre-charged to VDD during low clock phase to remove the memory effects. The current comparator has been designed in 180 nm CMOS process with 1.8 V supply. The comparator shows an average power consumption of 697 μW for 10 μA input current.