Data driven approach for low-power pre-computation-based content addressable memory

Abstract

Content addressable memory (CAM) plays an important role in the performance of many applications such as DCT transforms, processor caches, database accelerators, and network routers because it enables high-speed search operations with hardware acceleration. However, the power consumption of CAM is rather high because within CAM, searching is conducted in parallel for all registered words. Hence, pre-computation-based CAM, i.e., PB-CAM, was proposed in [1] in order to reduce the number of parallel-operated words by first filtering using a precomputation circuit called the parameter extractor. In this work, we propose a data driven algorithm — local grouping (LG) — to synthesize a parameter extractor for PB-CAM such that the registered data can be uniformly mapped to construct parameters; the cost of implementing the parameter extractor is also decreased. Moreover, we also adopt a discard and interlace (DAI) method that can further reduce the impact on non-uniform cases, which happens when most data are identical in some data blocks before LG processing. In experiments, average power consumption reduction of 60.4% was achieved and the number of CMOSs used was also reduced by 0.52%, when compared with the conventional gate-block selection algorithm [2].