Measuring inter-layer edge placement error with SEM contours

F. Weisbuch, Jirka Schatz, M. Ruhm
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引用次数: 5

Abstract

For advanced technology nodes, the patterning of integrated circuits requires not only a very good control of critical dimensions but also a very accurate control of the alignment between layers. These two factors combine to define the metric of inter-layer edge placement error (EPE) that quantifies the quality of the pattern placement critical for yield. In this work, we consider the inter-layer EPE between a contact layer with respect to a poly layer measured with SEM contours. Inter-layer EPE was measured across wafer for various critical features to assess the importance of dimensional and overlay variability. Area of overlap between contact and poly as well as contact centroid distribution were considered to further characterize the interaction between poly and contact patterns.
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用扫描电镜等高线测量层间边缘放置误差
对于先进的技术节点,集成电路的图形化不仅需要很好的控制关键尺寸,而且需要非常精确地控制层与层之间的对齐。这两个因素结合起来定义了层间边缘放置误差(EPE)的度量,该度量量化了对成品率至关重要的图案放置质量。在这项工作中,我们考虑了接触层之间的层间EPE,相对于用SEM轮廓测量的聚层。测量了晶圆上各种关键特征的层间EPE,以评估尺寸和覆盖变异性的重要性。考虑了接触点与多边形之间的重叠面积以及接触质心分布,进一步表征了多边形与接触模式之间的相互作用。
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