{"title":"A sparse tree adder with carry-select designed by reversible logic","authors":"Wang Renping, Zhuang Tingting, Jiang Hao","doi":"10.1109/ICCPS.2016.7751107","DOIUrl":null,"url":null,"abstract":"In this paper, we proposed a 32-bit improved adder combined with sparse tree by radix-2 and carry select. We designed its models-point operation, carry-out, 4-bit ripple-carry adder and 4-bit selector by reversible logic, and designed with smic0.18um process corresponding MOS circuit to achieve. The simulation results could verify that the algorithm and the design by reversible logic are right.","PeriodicalId":348961,"journal":{"name":"2016 International Conference On Communication Problem-Solving (ICCP)","volume":"68 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2016-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 International Conference On Communication Problem-Solving (ICCP)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICCPS.2016.7751107","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
In this paper, we proposed a 32-bit improved adder combined with sparse tree by radix-2 and carry select. We designed its models-point operation, carry-out, 4-bit ripple-carry adder and 4-bit selector by reversible logic, and designed with smic0.18um process corresponding MOS circuit to achieve. The simulation results could verify that the algorithm and the design by reversible logic are right.