Runtime resource allocation in multi-core packet processing systems

Abstract

Packet forwarding operations in network systems are often performed in software so that routers can be updated as new protocols and service features are developed. To meet the processing demands of high-performance networks, multi-processor systems-on-a-chip with dozens of cores are employed to provide raw processing power. Management of these processors and other system resources to achieve high forwarding rates is a key challenge. In particular, the allocation of processing workloads and the placement of data structures in memory have an enormous impact on system performance. Our work proposes a runtime system that manages these system resources. Much related work has proposed the use of cache memory hierarchies in packet processors. In this work, we show that our dynamic placement strategy can outperform a conventional cache memory and achieve up to 1.77 times higher hit rates for small memories, which are typically found in packet processing systems.