Hang Wang, Hongbin Sun, Xuchong Zhang, Qiubo Chen, Pengju Ren, Xiaogang Wu, S. Yin, Zhiqian Jiang, Xiang Li, Daqiang Han, S. Yu, Shaojun Wei, Nanning Zheng
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引用次数: 1
Abstract
This paper presents a video display processor which supports a variety of video formats and integrates multiple advanced functions for image quality improvement, including edge-directed image upscaling, guided image filter (GIF) based detail enhancement and noise reduction, multi-view autostereoscopic 3D processing, etc. By leveraging algorithm and architecture co-design, this work efficiently implements these computational intensive display processing functions in a single chip. The chip is fabricated in GF 55nm CMOS technology, and the core size is 38.71mm2 including 1.8M logic gates and 541KB SRAM. The chip works at the maximum operating frequency of 594MHz with the core supply voltage of 1.2V. The maximum input and output video formats reach up to 4K×2K@60fps.
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