A. M. Abdel-Aziz, Omar H. Fawzy, Haytham O. Zahran, Karim A. Tera, M. Sabry, H. Omran
{"title":"Design Automation of Fully-Differential Folded Cascode OTA Using Nested Iterations","authors":"A. M. Abdel-Aziz, Omar H. Fawzy, Haytham O. Zahran, Karim A. Tera, M. Sabry, H. Omran","doi":"10.1109/JEC-ECC.2018.8679537","DOIUrl":null,"url":null,"abstract":"Analog amplifiers are indispensable in any analog/mixed-signal system. The design of an operational transconductance amplifier (OTA) to meet a set of specifications is a non-trivial task that requires analog design expertise and time consuming simulations. In this paper, we present a systematic and automated design flow for the most popular integrated circuit OTA architecture, namely, the folded cascode OTA. The design procedure is customized for using the OTA in a fully-differential switched capacitor amplifier application. The presented design flow uses the gm/ID methodology and is automated using MAT-LAB. The OTA transistor sizing is computed using a nested iterative procedure. The design procedure takes into account the effect of several circuit parameters that have no closed form solutions, without invoking a simulation engine inside the loop. A complete design example is illustrated and verified using Cadence Spectre simulator.","PeriodicalId":197824,"journal":{"name":"2018 International Japan-Africa Conference on Electronics, Communications and Computations (JAC-ECC)","volume":"75 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2018-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2018 International Japan-Africa Conference on Electronics, Communications and Computations (JAC-ECC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/JEC-ECC.2018.8679537","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 4
Abstract
Analog amplifiers are indispensable in any analog/mixed-signal system. The design of an operational transconductance amplifier (OTA) to meet a set of specifications is a non-trivial task that requires analog design expertise and time consuming simulations. In this paper, we present a systematic and automated design flow for the most popular integrated circuit OTA architecture, namely, the folded cascode OTA. The design procedure is customized for using the OTA in a fully-differential switched capacitor amplifier application. The presented design flow uses the gm/ID methodology and is automated using MAT-LAB. The OTA transistor sizing is computed using a nested iterative procedure. The design procedure takes into account the effect of several circuit parameters that have no closed form solutions, without invoking a simulation engine inside the loop. A complete design example is illustrated and verified using Cadence Spectre simulator.