Predictability of image processing algorithms on heterogeneous MPSoC

Abstract

Multiprocessor System-on-Chip (MPSoC) designs offer a lot of computational power assembled in a compact design. The computing power of MPSoCs can be further augmented by adding heterogeneous processing elements, e.g. massively parallel processor arrays (MPPA) and specialized hardware with instruction-set extensions. However, the presence of multiple processing elements (PEs) with different characteristics raises issues related to programming and application mapping. The conventional approach used for programming heterogeneous MPSoCs results in a static mapping of various parts of the application to different PE types, based on the nature of the algorithm and the structure of the PEs. Yet, such a mapping scheme independent of the instantaneous load on the PEs may lead to under-utilization of some type of PEs while overloading others. We investigate the benefits of a resource-aware programming model called Invasive Computing for dynamically mapping image processing applications to different types of PEs available on a heterogeneous MPSoC. A case study of visual object recognition is presented, including Harris corner detection and SIFT feature matching. Results indicate that resource-aware programming helps to predict the latency of the application program along with better overall workload distribution within the heterogeneous MPSoC.