Do-Yeon Yoon, Sonal Pinto, SungWon Chung, P. Merolla, Thong-Wei Koh, D. Seo
{"title":"A 1024-Channel Simultaneous Recording Neural SoC with Stimulation and Real-Time Spike Detection","authors":"Do-Yeon Yoon, Sonal Pinto, SungWon Chung, P. Merolla, Thong-Wei Koh, D. Seo","doi":"10.23919/VLSICircuits52068.2021.9492480","DOIUrl":null,"url":null,"abstract":"A fully implantable brain-machine interface (BMI) targeting clinical applications has stringent size and power requirements. In this paper we present a 5×4mm2 neural system-on-chip (SoC) capable of recording and stimulating from 1024 implanted electrodes via a serial digital link. The design has on-chip configurable spike detection that can reduce off-chip bandwidth by 1250×. With fully integrated power management circuitry with power-on-reset and brown-out detection, our design consumes 24.7mW total power consumption, making it the lowest-power, highest-density AC-coupled neural SoC reported for recording both local field potential (LFP) and action potential (AP) with a 5Hz-10kHz bandwidth.","PeriodicalId":106356,"journal":{"name":"2021 Symposium on VLSI Circuits","volume":"33 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2021-06-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"22","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2021 Symposium on VLSI Circuits","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.23919/VLSICircuits52068.2021.9492480","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 22
Abstract
A fully implantable brain-machine interface (BMI) targeting clinical applications has stringent size and power requirements. In this paper we present a 5×4mm2 neural system-on-chip (SoC) capable of recording and stimulating from 1024 implanted electrodes via a serial digital link. The design has on-chip configurable spike detection that can reduce off-chip bandwidth by 1250×. With fully integrated power management circuitry with power-on-reset and brown-out detection, our design consumes 24.7mW total power consumption, making it the lowest-power, highest-density AC-coupled neural SoC reported for recording both local field potential (LFP) and action potential (AP) with a 5Hz-10kHz bandwidth.