N. M. Zawawi, M. F. Ain, S. Hassan, M. Zakariya, C.Y. Hui, R. Hussin
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引用次数: 11
Abstract
This paper will discuss the design and implementation of the digital up converter (DUC) in Field Programmable Gate Array (FPGA). DUC is a digital circuit which generating digital intermediate frequency (IF) signal from low complex digital baseband signal. The DUC provides pulse shaping, interpolation and frequency translation where the up-sampled signal is shifted from centered frequency (0 Hz) to intermediate frequency. Due to Wideband Code Division Multiple Access (WCDMA) specifications, the DUC is to pulse shaped and up sampled the baseband signal by a factor of 16. The DUC up sampled the signal up to 61.44 MHz.
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