Active Disturbance Rejection Controller with Virtual Impedance-based Current Limiter for Voltage Regulation of DC/DC Converters

Asimenia Korompili, A. Monti
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Abstract

In this paper we integrate a virtual impedance-based current limiter (VICL) in the active disturbance rejection control (ADRC) employed for the voltage regulation of buck converters in MTDC systems. The ADRC voltage controller consists of a linear quadratic Gaussian (LQG) structure with reference trajectory generator. Small-signal stability analysis and time-domain simulations investigate the performance of this ADRC+VICL model. The VICL manages to limit the over-current of the converter without affecting the stability of the system. The converter achieves to exit the overcurrent limiting mode and enter the voltage control mode smoothly. The ADRC mitigates the interactions between different components in the system and stabilises it, thanks to the virtual disturbance, which represents the actual dynamics at the converter terminals. The beneficial performance characteristics of the ADRC+VICL model are also demonstrated through real-time simulations results.
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基于虚拟阻抗限流器的DC/DC变换器电压调节自抗扰控制器
本文将基于虚拟阻抗的限流器(VICL)集成到MTDC系统降压变换器的自抗扰控制(ADRC)中。ADRC电压控制器由线性二次高斯(LQG)结构和参考轨迹发生器组成。小信号稳定性分析和时域仿真研究了该ADRC+VICL模型的性能。VICL能够在不影响系统稳定性的情况下限制转换器的过电流。实现了变换器顺利退出过流限流模式,进入电压控制模式。ADRC减轻了系统中不同组件之间的相互作用,并稳定了系统,这要归功于虚拟扰动,它代表了变换器终端的实际动态。通过实时仿真结果验证了ADRC+VICL模型的有利性能特性。
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