{"title":"Automatic feasibility/performance estimation of mixed-signal circuits based on design specifications","authors":"Kyung-Im Son, Heung-Joon Park, M. Soma","doi":"10.1109/ASIC.1997.616989","DOIUrl":null,"url":null,"abstract":"This paper proposes a new technique to estimate the feasibility/performance surfaces of mixed-signal circuits. The estimates will be used to construct a multi-class classifier which can be used as an automatic topology selector for the top-down design of analog circuits. The technique employs an ANN classification algorithm that requires no a priori knowledge of the complexity or shape of estimated surfaces. The estimation is optimized with respect to the training data size using a query-based data growing technique. As a case study, the feasibility/performance surfaces of sub-circuits in a 2nd order /spl Sigma/-/spl Delta/ ADC are estimated. The estimation results confirm the generality of the proposed method. Estimated surfaces can be updated swiftly as the process technology evolves, which makes our technique nearly process technology independent.","PeriodicalId":300310,"journal":{"name":"Proceedings. Tenth Annual IEEE International ASIC Conference and Exhibit (Cat. No.97TH8334)","volume":"38 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1997-09-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings. Tenth Annual IEEE International ASIC Conference and Exhibit (Cat. No.97TH8334)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ASIC.1997.616989","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
This paper proposes a new technique to estimate the feasibility/performance surfaces of mixed-signal circuits. The estimates will be used to construct a multi-class classifier which can be used as an automatic topology selector for the top-down design of analog circuits. The technique employs an ANN classification algorithm that requires no a priori knowledge of the complexity or shape of estimated surfaces. The estimation is optimized with respect to the training data size using a query-based data growing technique. As a case study, the feasibility/performance surfaces of sub-circuits in a 2nd order /spl Sigma/-/spl Delta/ ADC are estimated. The estimation results confirm the generality of the proposed method. Estimated surfaces can be updated swiftly as the process technology evolves, which makes our technique nearly process technology independent.