Influence of circuit layout and packaging on fast computer performance

Abstract

As the speed of integrated circuits improves, the contribution of the interconnections between the circuits becomes more important and may be the dominant factor in the system performance. To establish a criterion for comparison of future developments, some current construction techniques are examined in detail, and the connection distances plotted as a function of the size of the subunits connected. It is shown that the connection distances vary approximately as the square root of the number of chips to be interconnected, although this relationship can be improved by careful layout and physical design of the system. To make a further significant improvement in packing density, it is necessary to remove the packages from the integrated circuits and mount several together on a common assembly. A memory system using such techniques is compared with previous systems, and it is shown that with a basic circuit-speed improvement of a factor of 3.8, the overall system speed may only be improved by a factor of 3 without packaging improvements, but that an improvement of 4.4 times can be obtained with better packaging.