{"title":"Fail-safe synchronization of redundant microprocessor control systems","authors":"D. Haberman","doi":"10.1109/VTC.1982.1623053","DOIUrl":null,"url":null,"abstract":"This paper presents a design solution to the problem of how to maintain synchronization between redundant microprocessor control systems controlling a fully automated transit passenger vehicle. This design allows redundant systems to make sequential calculations and perform disparity checking on each other's data in a close coupled synchronized manner. Also, the integrity of certain calculations using sensor input data often requires the clock frequency to be maintained within a close tolerance of its specified frequency for accurate calculations. This system detects frequency out-of-tolerance conditions and hardware failures in the timing and checking circuits and initiates a safe response when they occur.","PeriodicalId":230854,"journal":{"name":"32nd IEEE Vehicular Technology Conference","volume":"14 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1982-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"32nd IEEE Vehicular Technology Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VTC.1982.1623053","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 4
Abstract
This paper presents a design solution to the problem of how to maintain synchronization between redundant microprocessor control systems controlling a fully automated transit passenger vehicle. This design allows redundant systems to make sequential calculations and perform disparity checking on each other's data in a close coupled synchronized manner. Also, the integrity of certain calculations using sensor input data often requires the clock frequency to be maintained within a close tolerance of its specified frequency for accurate calculations. This system detects frequency out-of-tolerance conditions and hardware failures in the timing and checking circuits and initiates a safe response when they occur.