SlimeMold: Hardware Load Balancer at Scale in Datacenter

Ziyuan Liu, Zhixiong Niu, Ran Shu, Liang Gao, Guohong Lai, Na Wang, Zongying He, Jacob Nelson, Dan R. K. Ports, Lihua Yuan, Peng Cheng, Y. Xiong
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Abstract

Stateful load balancers (LB) are essential services in cloud data centers, playing a crucial role in enhancing the availability and capacity of applications. Numerous studies have proposed methods to improve the throughput, connections per second, and concurrent flows of single LBs. For instance, with the advancement of programmable switches, hardware-based load balancers (HLB) have become mainstream due to their high efficiency. However, programmable switches still face the issue of limited registers and table entries, preventing them from fully meeting the performance requirements of data centers. In this paper, rather than solely focusing on enhancing individual HLBs, we introduce SlimeMold, which enables HLBs to work collaboratively at scale as an integrated LB system in data centers. First, we design a novel HLB building block capable of achieving load balancing and exchanging states with other building blocks in the data plane. Next, we decouple forwarding and state operations, organizing the states using our proposed 2-level mapping mechanism. Finally, we optimize the system with flow caching and table entry balancing. We implement a real HLB building block using the Broadcom 56788 SmartToR chip, which attains line rate for state read and >1M OPS for flow write operations. Our simulation demonstrates full scalability in large-scale experiments, supporting 454 million concurrent flows with 512 state-hosting building blocks.
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SlimeMold:数据中心的大规模硬件负载均衡器
有状态负载平衡器(LB)是云数据中心的基本服务,在提高应用程序的可用性和容量方面起着至关重要的作用。许多研究已经提出了提高单个lb的吞吐量、每秒连接数和并发流的方法。例如,随着可编程交换机的发展,基于硬件的负载平衡器(HLB)因其高效率而成为主流。然而,可编程交换机仍然面临寄存器和表项有限的问题,使其无法完全满足数据中心的性能要求。在本文中,我们不是仅仅专注于增强单个LB,而是介绍了SlimeMold,它使LB能够在数据中心中作为集成LB系统大规模协同工作。首先,我们设计了一个新的HLB构建块,能够实现负载平衡并与数据平面中的其他构建块交换状态。接下来,我们解耦转发和状态操作,使用我们提出的2级映射机制组织状态。最后,我们通过流缓存和表项平衡对系统进行了优化。我们使用Broadcom 56788 SmartToR芯片实现了一个真正的HLB构建块,该芯片实现了状态读取的线速率和>1M OPS的流写入操作。我们的模拟在大规模实验中展示了完全的可扩展性,支持4.54亿个并发流和512个状态托管构建块。
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