Realization of Power Efficient FIR Filters using Hybrid Accurate-Inaccurate Adder Architecture

Abstract

In this paper, two new inaccurate adder circuits are proposed. The proposed adder circuits are found to have less area and error rate. They are analyzed in terms of error metrics, delay, area, and power, and compared with those of conventional adders. A linear phase direct form finite impulse response filter is implemented using the proposed inaccurate adders, and performance is evaluated. It is shown that by using a combination of accurate and proposed inaccurate adders, the power consumption can be reduced, without much degradation in the filter performances.