High throughput pipelined architecture for fast 2-D 4×4 forward integer transform of H.264

R. Mukherjee, W. H. Prasad, P. Dheeraj, I. Chakrabarti, S. Sengupta
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引用次数: 2

Abstract

The H.264 standard uses integer transform block in its encoder. In this paper, a pipelined architecture of fast 2-D forward integer transform is proposed. For video compression applications such as Television Studio Broadcast or Surveillance Videos, where throughput is of prime importance for real-time encoding, we propose an efficient realization of the forward integer transform unit. Using Xilinx Virtex-5 technology, the proposed architecture gives an excellent throughput of 5383 Mpixels/sec, where the critical path delay is 2.97 ns and the maximum operating frequency is of 336 MHz.
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H.264快速二维4×4正向整数变换的高吞吐量流水线结构
H.264标准在其编码器中使用整数变换块。本文提出了一种快速二维正整数变换的流水线结构。对于视频压缩应用,如电视演播室广播或监控视频,其中吞吐量对实时编码至关重要,我们提出了一种有效的前向整数变换单元的实现。采用Xilinx Virtex-5技术,该架构提供了5383 Mpixels/sec的出色吞吐量,其中关键路径延迟为2.97 ns,最大工作频率为336 MHz。
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