R. Mukherjee, W. H. Prasad, P. Dheeraj, I. Chakrabarti, S. Sengupta
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引用次数: 2
Abstract
The H.264 standard uses integer transform block in its encoder. In this paper, a pipelined architecture of fast 2-D forward integer transform is proposed. For video compression applications such as Television Studio Broadcast or Surveillance Videos, where throughput is of prime importance for real-time encoding, we propose an efficient realization of the forward integer transform unit. Using Xilinx Virtex-5 technology, the proposed architecture gives an excellent throughput of 5383 Mpixels/sec, where the critical path delay is 2.97 ns and the maximum operating frequency is of 336 MHz.