Modeling and simulation with hardware description languages

Abstract

The role of HDL modeling and simulation in the design process is discussed. The modeling process involves both model and model test development. Simulation is used to ensure model correctness. Being able to create HDL models of complex systems is imperative in designing today's systems, but model creation and validation is itself a complex task. Intelligent use of tools is necessary to simplify of this effort. Hardware description languages such as VHDL have a powerful set of constructs, but the modeler must keep in mind the model's application when coding it. Model test benches that can be reused throughout the design cycle and simulation efficiency are critical to effective model testing.