Addressing mode selection

International Symposium on Code Generation and Optimization, 2003. CGO 2003. Pub Date : 2003-03-23 DOI:10.1109/CGO.2003.1191557

E. Eckstein, Bernhard Scholz

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引用次数: 8

Abstract

Many processor architectures provide a set of addressing modes in their address generation units. For example DSP (digital signal processors) have powerful addressing modes for efficiently implementing numerical algorithms. Typical addressing modes of DSP are auto post-modification and indexing for address registers. The selection of the optimal addressing modes in the means of minimal code size and minimal execution time depends on many parameters and is NP complete in general. In this work we present a new approach for solving the addressing mode selection (AMS) problem. We provide a method for modeling the target architecture's addressing modes as cost functions for a partitioned Boolean quadratic optimization problem (PBQP). For solving the PBQP we present an efficient and effective way to implement large matrices for modeling the cost model. We have integrated the addressing mode selection with the Atair C-Compiler for the uPD7705x DSP from NEC. In our experiments we show that the addressing mode selection can be optimally solved for almost all benchmark programs and the compile-time overhead of the address mode selection is within acceptable bounds for a production DSP compiler.

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寻址模式选择

许多处理器体系结构在其地址生成单元中提供了一组寻址模式。例如，DSP(数字信号处理器)具有强大的寻址模式，可以有效地实现数值算法。DSP的典型寻址方式是地址寄存器的自动后处理和索引。以最小的代码大小和最小的执行时间选择最优寻址模式取决于许多参数，通常是NP完全的。本文提出了一种解决寻址模式选择(AMS)问题的新方法。我们提供了一种将目标架构的寻址模式建模为分割布尔二次优化问题(PBQP)的代价函数的方法。为了解决PBQP问题，我们提出了一种高效的方法来实现大矩阵的成本模型建模。我们将寻址模式选择与NEC的uPD7705x DSP的Atair C-Compiler集成在一起。在我们的实验中，我们表明寻址模式选择可以最优地解决几乎所有基准程序，并且地址模式选择的编译时开销在生产DSP编译器的可接受范围内。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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International Symposium on Code Generation and Optimization, 2003. CGO 2003.

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