The role of optics in future high radix switch design

N. Binkert, A. Davis, N. Jouppi, M. McLaren, Naveen Muralimanohar, R. Schreiber, Jung Ho Ahn
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引用次数: 87

Abstract

For large-scale networks, high-radix switches reduce hop and switch count, which decreases latency and power. The ITRS projections for signal-pin count and per-pin bandwidth are nearly flat over the next decade, so increased radix in electronic switches will come at the cost of less per-port bandwidth. Silicon nanophotonic technology provides a long-term solution to this problem. We first compare the use of photonic I/O against an all-electrical, Cray YARC inspired baseline. We compare the power and performance of switches of radix 64, 100, and 144 in the 45, 32, and 22 nm technology steps. In addition with the greater off-chip bandwidth enabled by photonics, the high power of electrical components inside the switch becomes a problem beyond radix 64. We propose an optical switch architecture that exploits high-speed optical interconnects to build a flat crossbar with multiple-writer, single-reader links. Unlike YARC, which uses small buffers at various stages, the proposed design buffers only at input and output ports. This simplifies the design and enables large buffers, capable of handling ethernet-size packets. To mitigate head-of-line blocking and maximize switch throughput, we use an arbitration scheme that allows each port to make eight requests and use two grants. The bandwidth of the optical crossbar is also doubled to to provide a 2x internal speedup. Since optical interconnects have high static power, we show that it is critical to balance the use of optical and electrical components to get the best energy efficiency. Overall, the adoption of photonic I/O allows 100,000 port networks to be constructed with less than one third the power of equivalent all-electronic networks. A further 50% reduction in power can be achieved by using photonics within the switch components. Our best optical design performs similarly to YARC for small packets while consuming less than half the power, and handles 80% more load for large message traffic.
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光学在未来高基数开关设计中的作用
对于大型网络,高基数交换机可以减少跳数和交换机计数,从而降低延迟和功耗。ITRS对信号引脚数和每引脚带宽的预测在未来十年几乎持平,因此电子交换机基数的增加将以每端口带宽的减少为代价。硅纳米光子技术为这一问题提供了一个长期的解决方案。我们首先比较了光子I/O与全电Cray YARC启发基线的使用。我们比较了45、32和22 nm工艺步骤中基数64、100和144开关的功率和性能。此外,随着光子学带来更大的片外带宽,开关内部电子元件的高功率成为基数64以外的一个问题。我们提出了一种利用高速光互连来构建具有多写入器、单读取器链路的平面交叉排的光交换机架构。与YARC不同的是,它在各个阶段使用小缓冲区,所提出的设计仅在输入和输出端口缓冲。这简化了设计并支持大型缓冲区,能够处理以太网大小的数据包。为了减轻线路阻塞并最大限度地提高交换机吞吐量,我们使用一种仲裁方案,允许每个端口发出8个请求并使用两个授予。光交叉条的带宽也增加了一倍,以提供2倍的内部加速。由于光互连具有高静态功率,因此我们表明平衡光学和电子元件的使用以获得最佳能源效率至关重要。总体而言,采用光子I/O可以构建100,000个端口网络,其功率不到等效全电子网络的三分之一。通过在开关元件中使用光子学,可以进一步降低50%的功率。我们最好的光学设计在处理小数据包时的性能与YARC相似,而功耗不到YARC的一半,并且在处理大型消息流量时可多处理80%的负载。
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