Automatic Frequency Calibration Module based on High-speed Counter

Abstract

An automatic frequency calibration (AFC) based on high-speed counter is proposed for all-digital phase-locked loop(ADPLL). The AFC module is designed for coarse and medium calibration. The calibration mode is updated after the frequency difference is 0. For the frequency difference is accurate, the AFC adopts double-edge counting and satisfies the relation of real frequency and target frequency. The AFC and counter circuit implemented in a 40nm CMOS process occupies $2358.8\mu\mathrm{m}2$. Under the condition that the reference frequency is 100MHz and the DCO output frequency is 1GHz, the calibration needs about $5\mu\mathrm{s}$ in the best case, and $21\mu\mathrm{s}$ in the worst case.