Task oriented visual interface for debugging timing problems in hardware design

Abstract

We describe a graphical toolkit for debugging timing problems in hardware design. The toolkit was developed as a part of the graphical user interface for a static timing analysis tool PrimeTime from Synopsys Inc. A static timing analysis tool identifies critical logical paths with timing violations in a circuit design without simulating the design, thereby dramatically shortening the time required for timing closure. The toolkit's visual organization of multiple graphical views of timing data helps the user manage the complexity of the data and the debugging process.