Paweł Pieńczuk, C. Kołaciński, A. Szymanski, P. Janus, K. Kucharski, D. Obrebski, M. Zbiec, M. Jakubowski
{"title":"Multichannel Programmable Readout IC for Photodiodes Array","authors":"Paweł Pieńczuk, C. Kołaciński, A. Szymanski, P. Janus, K. Kucharski, D. Obrebski, M. Zbiec, M. Jakubowski","doi":"10.23919/MIXDES49814.2020.9155567","DOIUrl":null,"url":null,"abstract":"This paper describes the design of the 17-channel readout integrated circuit targeted to front-end operation for photodiodes array. Proposed system contains an analog frontend electronics digitally configured using built-in Serial Peripheral Interface. Each signal channel has been designed for one particular set of photodiodes. Chip was designed and fabricated utilizing CMOS 0.18 μm technology and occupies area of 4960 μm × 1525 μm. Total current consumption is expected to be less than 33 mW (with 3.3 V supply).","PeriodicalId":145224,"journal":{"name":"2020 27th International Conference on Mixed Design of Integrated Circuits and System (MIXDES)","volume":"44 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2020-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2020 27th International Conference on Mixed Design of Integrated Circuits and System (MIXDES)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.23919/MIXDES49814.2020.9155567","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
This paper describes the design of the 17-channel readout integrated circuit targeted to front-end operation for photodiodes array. Proposed system contains an analog frontend electronics digitally configured using built-in Serial Peripheral Interface. Each signal channel has been designed for one particular set of photodiodes. Chip was designed and fabricated utilizing CMOS 0.18 μm technology and occupies area of 4960 μm × 1525 μm. Total current consumption is expected to be less than 33 mW (with 3.3 V supply).