Stability analysis of voltage regulators versus different digital control strategies by analog-mixed-signal circuit simulation

F. Bizzarri, A. Brambilla
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引用次数: 1

Abstract

Voltage regulator modules (VRMs) used in modern computers can work in “extreme” conditions since they supply high currents at a very low voltage and keep voltage swing inside a small tolerance interval against large variations of load currents. This is done by designing a digital controller that allows the VRM to behave as much as possible as an ideal voltage source with a very small series resistor. This can be achieved through different possible choices of controlling schema. We show that, considering also effects due to parasitics, controlling schema reflect on stability and on the admissible minimum size of the capacitor bank filtering the VRM output voltage. Moreover we show how the output impedance of the VRM degrades versus lowering of the bank size. This is done by resorting to a general and efficient technique, already presented in the literature, allowing to (i) determine the periodic steady state behaviour of these circuits together with their stability and (ii) derive time varying transfer functions such as, for example, the output impedance of VRMs.
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通过模拟混合信号电路仿真分析不同数字控制策略下稳压器的稳定性
现代计算机中使用的电压调节器模块(VRMs)可以在“极端”条件下工作,因为它们在非常低的电压下提供高电流,并在负载电流大变化的情况下将电压摆动保持在很小的容差范围内。这是通过设计一个数字控制器来实现的,该控制器允许VRM尽可能地表现为具有非常小的串联电阻的理想电压源。这可以通过选择不同的控制模式来实现。我们表明,考虑到寄生效应的影响,控制模式反映了稳定性和滤波VRM输出电压的电容器组的可接受最小尺寸。此外,我们还展示了VRM的输出阻抗如何随着银行规模的降低而下降。这是通过求助于文献中已经提出的一种通用而有效的技术来完成的,允许(i)确定这些电路的周期性稳态行为及其稳定性,(ii)推导时变传递函数,例如,vrm的输出阻抗。
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