Flexible real time signal filtering in space using reconfigurable logic

Abstract

The High Performance Computing (HPC-I) payload is an innovative computing device designed for deployment on the Australian scientific mission satellite FedSat. HPC-I will validate and evaluate the practicality of using reconfigurable field programmable gate array (FPGA) technology in the space environment. The deployment of reconfigurable FPGA technology on-board satellites is a very promising solution for digital signal processing in the challenging space environment, offering tremendous flexibility to adapt to changing operation requirements, while achieving very high performance. Such combined flexibility and performance is not found in conventional signal processing architectures. This paper presents the design and implementation on HPC-I of two common digital signal filtering algorithms, a 4-tap low pass FIR filter and a 32-tap moving average filter. The flexibility and adaptability of the system is discussed in the context of more complex functionality and changing operation requirements.