μNAS: Constrained Neural Architecture Search for Microcontrollers

Edgar Liberis, L. Dudziak, N. Lane
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引用次数: 66

Abstract

IoT devices are powered by microcontroller units (MCUs) which are extremely resource-scarce: a typical MCU may have an underpowered processor and around 64 KB of memory and persistent storage. Designing neural networks for such a platform requires an intricate balance between keeping high predictive performance (accuracy) while achieving low memory and storage usage and inference latency. This is extremely challenging to achieve manually, so in this work, we build a neural architecture search (NAS) system, called μNAS, to automate the design of such small-yet-powerful MCU-level networks. μNAS explicitly targets the three primary aspects of resource scarcity of MCUs: the size of RAM, persistent storage and processor speed. μNAS represents a significant advance in resource-efficient models, especially for "mid-tier" MCUs with memory requirements ranging from 0.5 KB to 64 KB. We show that on a variety of image classification datasets μNAS is able to (a) improve top-1 classification accuracy by up to 4.8%, or (b) reduce memory footprint by 4-13×, or (c) reduce the number of multiply-accumulate operations by at least 2×, compared to existing MCU specialist literature and resource-efficient models. μNAS is freely available for download at https://github.com/eliberis/uNAS
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μNAS:微控制器约束神经结构搜索
物联网设备由资源极其稀缺的微控制器单元(MCU)供电:典型的MCU可能具有功率不足的处理器和大约64 KB的内存和持久存储。为这样的平台设计神经网络需要在保持高预测性能(准确性)与实现低内存和存储使用以及推理延迟之间取得复杂的平衡。这是极具挑战性的手动实现,所以在这项工作中,我们建立了一个神经架构搜索(NAS)系统,称为μNAS,以自动设计这种小而强大的mcu级网络。μNAS明确针对mcu资源稀缺的三个主要方面:RAM大小、持久存储和处理器速度。μNAS代表了资源效率模型的重大进步,特别是对于内存要求从0.5 KB到64 KB的“中间层”mcu。研究表明,与现有的MCU专业文献和资源高效模型相比,μNAS在各种图像分类数据集上能够(a)将top1分类精度提高4.8%,或(b)将内存占用减少4-13倍,或(c)将乘法累积操作次数减少至少2倍。μNAS可以在https://github.com/eliberis/uNAS上免费下载
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