High performance flow matching architecture for OpenFlow data plane

Abstract

Increasing demands for faster, more responsive and manageable networks have brought about a different approach to networking - Software Defined Networking (SDN). SDN introduces flow-based networking with a centralized controller. Matching incoming traffic flows with rules sent by the controller is an integral part of traffic forwarding in SDN. How efficiently this is carried out has a huge impact on network performance. In this paper, we present a high-performance, low-cost architecture for flow matching in an SDN switch. Our architecture consists of a dedicated unit for flow matching and a custom processor. Novel design of the flow match unit reduces matching latency significantly, when compared with the generic architecture, while also reducing usage of costly resources like TCAMs. When testing on FPGA platforms, implementing the system required only a minimum amount (around 10% on Virtex-7) of hardware resources.