{"title":"A new algorithm for fast retrieval of sequence components in 3-phase networks","authors":"Chunlin Li, F. Dawson","doi":"10.1109/PCC.2002.998171","DOIUrl":null,"url":null,"abstract":"The paper presents a new microprocessor based technique for fast retrieval of the current and voltage sequence components based on symmetrical component theory. The two-sample delay algorithm can operate at an arbitrary sampling frequency and executes with minimal computational burden. A three-point median filter is utilized to remove the impulsive noise that appears during the transient process. Simulations show that an optimal transient performance can be achieved using the proposed technique under unbalanced situations. Finally, a field programmable gate array (FPGA) implementation has been constructed to verify the theoretical results.","PeriodicalId":320424,"journal":{"name":"Proceedings of the Power Conversion Conference-Osaka 2002 (Cat. No.02TH8579)","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2002-08-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"9","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the Power Conversion Conference-Osaka 2002 (Cat. No.02TH8579)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/PCC.2002.998171","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 9
Abstract
The paper presents a new microprocessor based technique for fast retrieval of the current and voltage sequence components based on symmetrical component theory. The two-sample delay algorithm can operate at an arbitrary sampling frequency and executes with minimal computational burden. A three-point median filter is utilized to remove the impulsive noise that appears during the transient process. Simulations show that an optimal transient performance can be achieved using the proposed technique under unbalanced situations. Finally, a field programmable gate array (FPGA) implementation has been constructed to verify the theoretical results.