Malicious combinational Hardware Trojan detection by Gate Level Characterization in 90nm technology

Abstract

Globalization of Integrated Circuits (IC's) in semiconductor industries has made them vulnerable to intentional alterations of the design. These intentional alterations to a design are called Hardware Trojans (HT's). Since many of the designs are outsourced for its fabrication, there is a lot of chance for altering its functionality. It is very important to detect these Trojans as it may raise serious concern about hardware trust, especially in the field of military and security applications. This paper considers the detection of combinational trojans using Gate Level Characterization (GLC) and is based on the measurement of side-channel parameters, especially leakage power. The leakage power for an entire circuit is being calculated for each input vector. The obtained measurements are formulated as linear equations in Linear Programming (LP) and are solved using LP solver.