Structured ASIC Design for Space Systems Applications

Jai Bansal, B. Orlowsky, L. Rockett
{"title":"Structured ASIC Design for Space Systems Applications","authors":"Jai Bansal, B. Orlowsky, L. Rockett","doi":"10.1109/AERO.2005.1559552","DOIUrl":null,"url":null,"abstract":"As integrated circuit dimensions scale downward the costs of the photolithographic masks used to manufacture microcircuits are becoming prohibitively high. And in today's highly competitive business environment, time to market is increasingly critical. Custom standard-cell ASICs are on the wrong side of these dynamics with their long lead times and the need to build a full mask set per part number. Structured ASICs offer an attractive alternative. Structured ASICs are developed from an inventoried base masterslice chip design by using generally only a few back-end masking levels to personalize the resulting ASIC function, saving mask costs and shortening lead times per circuit design. Structured ASICs strategically fill the trade space between FPGAs and custom ASICs. BAE Systems has developed a radiation hardened structured ASIC product offering for next-generation advanced military and space applications","PeriodicalId":117223,"journal":{"name":"2005 IEEE Aerospace Conference","volume":"11 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2005-03-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2005 IEEE Aerospace Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/AERO.2005.1559552","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1

Abstract

As integrated circuit dimensions scale downward the costs of the photolithographic masks used to manufacture microcircuits are becoming prohibitively high. And in today's highly competitive business environment, time to market is increasingly critical. Custom standard-cell ASICs are on the wrong side of these dynamics with their long lead times and the need to build a full mask set per part number. Structured ASICs offer an attractive alternative. Structured ASICs are developed from an inventoried base masterslice chip design by using generally only a few back-end masking levels to personalize the resulting ASIC function, saving mask costs and shortening lead times per circuit design. Structured ASICs strategically fill the trade space between FPGAs and custom ASICs. BAE Systems has developed a radiation hardened structured ASIC product offering for next-generation advanced military and space applications
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空间系统应用的结构化ASIC设计
随着集成电路尺寸的缩小,用于制造微电路的光刻掩模的成本变得过高。在当今竞争激烈的商业环境中,上市时间变得越来越重要。定制的标准单元asic处于这些动态的错误一边,因为它们的交货时间长,并且需要为每个零件号构建完整的掩模集。结构化asic提供了一个有吸引力的选择。结构化ASIC是由库存基本主片芯片设计开发的,通常只使用几个后端屏蔽级别来个性化产生的ASIC功能,从而节省了掩模成本并缩短了每个电路设计的交货时间。结构化asic战略性地填补了fpga和定制asic之间的贸易空间。BAE系统公司为下一代先进军事和空间应用开发了一种抗辐射结构化ASIC产品
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