{"title":"A novel method for design and implementation of low power, high stable SRAM cell","authors":"Ashish K. Sharma, V. Ravi","doi":"10.1109/ICNETS2.2017.8067910","DOIUrl":null,"url":null,"abstract":"SRAM is widely used cache memory in the world. Materialization of low power SRAM with highest stability is a need of the hour. As from many years the requirement of fast and low power devices are augmenting. In this paper, in first part described about stability analysis from ADM (extract from N-Curve). After that information about leakage power is given. One 8T SRAM circuit is proposed with low power and highest probable stability. This paper promises reduction in power by 66%. The stability of the cell is also increased, i.e. WNM increased by 15.9%; penalty is in RNM by 7.9 %.","PeriodicalId":413865,"journal":{"name":"2017 International Conference on Nextgen Electronic Technologies: Silicon to Software (ICNETS2)","volume":"11 suppl_1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2017-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2017 International Conference on Nextgen Electronic Technologies: Silicon to Software (ICNETS2)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICNETS2.2017.8067910","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 4
Abstract
SRAM is widely used cache memory in the world. Materialization of low power SRAM with highest stability is a need of the hour. As from many years the requirement of fast and low power devices are augmenting. In this paper, in first part described about stability analysis from ADM (extract from N-Curve). After that information about leakage power is given. One 8T SRAM circuit is proposed with low power and highest probable stability. This paper promises reduction in power by 66%. The stability of the cell is also increased, i.e. WNM increased by 15.9%; penalty is in RNM by 7.9 %.
SRAM是目前世界上应用广泛的高速缓存存储器。实现具有最高稳定性的低功耗SRAM是迫切需要的。多年来，对快速低功耗器件的需求不断增加。在本文中，第一部分描述了ADM (extract from N-Curve)的稳定性分析。然后给出泄漏功率的信息。提出了一种低功耗、高稳定性的8T SRAM电路。这篇论文承诺减少66%的电力。细胞的稳定性也有所提高，即WNM提高了15.9%;惩罚是人民币贬值7.9%。
京公网安备 11010802042870号
京ICP备2023020795号-1
分享
求助内容：
应助结果提醒方式：
扫码关注我们
