{"title":"AHDL models to detect verification problems early in the design process","authors":"J.A. Barby, H. Shen","doi":"10.1109/ASIC.1997.617033","DOIUrl":null,"url":null,"abstract":"A suite of AHDL models has been developed to enhance the traditional simulation verification of an IC design before it goes to fabrication. A typical IC hardware verification unit is analyzed identifying a minimum subset of simulation models along with their specifications. Proof of concept models were written and tested on a simple IC design to illustrate their usefulness.","PeriodicalId":300310,"journal":{"name":"Proceedings. Tenth Annual IEEE International ASIC Conference and Exhibit (Cat. No.97TH8334)","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"1997-09-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings. Tenth Annual IEEE International ASIC Conference and Exhibit (Cat. No.97TH8334)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ASIC.1997.617033","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
A suite of AHDL models has been developed to enhance the traditional simulation verification of an IC design before it goes to fabrication. A typical IC hardware verification unit is analyzed identifying a minimum subset of simulation models along with their specifications. Proof of concept models were written and tested on a simple IC design to illustrate their usefulness.
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