Clifford+T-based quantum high speed multiplier

L. Biswal, Rakesh Das, A. Bhattacharjee, Sudip Ghosh, H. Rahaman
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Abstract

Nowadays, rapid advancement in quantum algorithm towards achieving so-called quantum supremacy, calls for the design of high scalable quantum circuit. Quantum computers are very sensitive towards noise. To suppress inherent noise, the fault tolerant quantum circuit becomes desirable feature which can be achieved by using quantum error correction code. Surface code is one of the promising error correction code that addresses this issue. The Clifford+T group is one universal gates set which is used with surface code. In VLSI, multiplier circuit has very crucial role in the design of digital computer and becomes a pivotal in the application of DSP. Here, we have implemented a high speed quantum multiplier circuit using Clifford+T. At the end of this work, we evaluated some cost parameters like T-depth associated with the performance of quantum circuit as shown in the result section.
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基于Clifford+的量子高速倍增器
如今,量子算法向着所谓的量子霸权的快速发展,要求设计高可扩展性的量子电路。量子计算机对噪声非常敏感。为了抑制固有噪声,采用量子纠错码可以实现容错量子电路。表面码是解决这个问题的一种很有前途的纠错码。Clifford+T群是一种与面码配合使用的通用门集。在超大规模集成电路中,乘法器电路在数字计算机的设计中起着至关重要的作用,在DSP的应用中起着举足轻重的作用。在这里,我们使用Clifford+T实现了高速量子乘法器电路。在这项工作的最后,我们评估了与量子电路性能相关的一些成本参数,如T-depth,如结果部分所示。
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