First Steps Towards Automating Hardware Proofs In HOL

Abstract

The use of higher-order logic and an associated interactive theorem proving environment for hardware verification has established itself as an important technique for formal hardware validation [CaGM 86, FFFH 89]. In spite of the fact that such techniques are powerful and can be used for validation of complex systems, they continue to remain purely within the purview of theorem proving specialists. The only way to bring such a system closer to circuit designers is to augment the degree of automation and provide a camouflaged environment which mirrors the designer's view of hardware. The first step in this direction is to automate the proofs of all first-order and simple higher-order statements, within such systems, which has been achieved by the tool FAUST [KuKS 91, ScKK 91a]. Further automation requires the use of domain specific knowledge. Our experiences in hardware verification using HOL [Gord 88] have shown that most proofs follow a definite pattern. This observation can be exploited to isolate the creative and mechanical steps in proofs, so as to aid the normal circuit designer in executing the creative steps, and to automate the remaining mechanical steps. A tool called MEPHISTO (M anaging Exhaustive Proofs of Hardware for Integrated circuit designers by Structuring Theorem proving Operations) has been embedded in HOL, so as to disguise the complexity of hardware proofs and to allow the designer to concentrate on design creativity. This extended abstract summarizes the work presented in [ScKK 91b] and is organized as follows: In section 2, we briefly outline the structure of hardware proofs in HOL and indicate the steps which can be automated. Section 3 deals with the details of some of the steps illustrated via an example. This is then followed by some results and conclusions.