{"title":"Design and analysis of online testability of reversible sequential circuits","authors":"Moshaddek Hasan, A. Islam, A. Chowdhury","doi":"10.1109/ICCIT.2009.5407143","DOIUrl":null,"url":null,"abstract":"Reversible logic plays an important role in the synthesis of circuits having application in quantum computing, low power CMOS design and nanotechnology-based system. In this paper, we have proposed the online testability of reversible sequential circuits, which is first ever proposed in literature. On the way to propose the online testability of reversible sequential circuits, we have proposed an improved Rail-check circuit that significantly improves the performance of the overall circuit in terms of gate cost and garbage cost parameters. We have also used our improved and efficient rail-check circuit to realize the testability of different benchmark circuits.","PeriodicalId":443258,"journal":{"name":"2009 12th International Conference on Computers and Information Technology","volume":"35 4 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2009-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"22","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2009 12th International Conference on Computers and Information Technology","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICCIT.2009.5407143","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 22
Abstract
Reversible logic plays an important role in the synthesis of circuits having application in quantum computing, low power CMOS design and nanotechnology-based system. In this paper, we have proposed the online testability of reversible sequential circuits, which is first ever proposed in literature. On the way to propose the online testability of reversible sequential circuits, we have proposed an improved Rail-check circuit that significantly improves the performance of the overall circuit in terms of gate cost and garbage cost parameters. We have also used our improved and efficient rail-check circuit to realize the testability of different benchmark circuits.