Performance Evaluation of Phosphorene Elevated Source Tunnel FET with Strained Channel and Ferroelectric Gate Oxide

Abstract

Present study explores electrostatically doped SOI heterojunction tunneling field-effect-transistor (FET) along with elevated source of phosphorene. Device deals with the vertically tunneling, strained channel and stacked ferroelectric gate oxide. This heterostructure device of tunneling FETs improves the drive current to. 1 mA of significant level with 0.2 V supply voltage. Device is also able to maintain sub-60 subthreshold swing throughout the whole operation (<0.3 V). Strained channel and ferroelectric gate oxide improves the performance of proposed Tunneling FET to the significant level with 10−2 fJ switching energy and 10−12s delay with steep switching of 0.1 mV/dec of point subthreshold swing for future CMOS scaling along with 1010 order of Ion/Ioff and 150 mV gate voltage swing. Further, inverter circuit also has analyzed with resistive load with the motive of enhancing the performance for the circuit designers.