{"title":"A new V.MOS/Bipolar Darlington transistor for power applications","authors":"G. David, J. Vallée, J. Lebailly","doi":"10.1109/IEDM.1980.189759","DOIUrl":null,"url":null,"abstract":"This paper deals with the design, processing, and electrical characteristics of a new monolithic power device comprising a V.MOS Field-Effect-Transistor as the driver component, and a bipolar low Emitter Concentration Transistor as the power output component. The study of the device has been made on the base of a 3,9 × 3,9 mm2chip. The device design is such that there is a complete compatibility between processing of the multiepitaxial bipolar power transistor and of the V.MOS transistor. The influence of the main parameters of the structure was studied, including : - Channel width of the V.MOS - Gate oxide thickness - Characteristics of the epitaxial layers A diffusion processing insuring a high gain for the bipolar transistor and a low threshold voltage of the V.MOS F.E.T. has been developed. The electrical measurements exhibit nice characteristics for medium voltage applications: - low threshold voltage : Vth< 2,5 V - high forward transconductance : gm> 5 A/V - low saturation voltage drop : Vsat< 1.8 V (for Ic = 10 A, VG= 10 V) - medium breakdow-voltage : BV> 90 V.","PeriodicalId":180541,"journal":{"name":"1980 International Electron Devices Meeting","volume":"14 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"1980 International Electron Devices Meeting","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IEDM.1980.189759","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 3
Abstract
This paper deals with the design, processing, and electrical characteristics of a new monolithic power device comprising a V.MOS Field-Effect-Transistor as the driver component, and a bipolar low Emitter Concentration Transistor as the power output component. The study of the device has been made on the base of a 3,9 × 3,9 mm2chip. The device design is such that there is a complete compatibility between processing of the multiepitaxial bipolar power transistor and of the V.MOS transistor. The influence of the main parameters of the structure was studied, including : - Channel width of the V.MOS - Gate oxide thickness - Characteristics of the epitaxial layers A diffusion processing insuring a high gain for the bipolar transistor and a low threshold voltage of the V.MOS F.E.T. has been developed. The electrical measurements exhibit nice characteristics for medium voltage applications: - low threshold voltage : Vth< 2,5 V - high forward transconductance : gm> 5 A/V - low saturation voltage drop : Vsat< 1.8 V (for Ic = 10 A, VG= 10 V) - medium breakdow-voltage : BV> 90 V.