{"title":"The shuffle/exchange-plus networks","authors":"S. Thanawastien","doi":"10.1145/503896.503912","DOIUrl":null,"url":null,"abstract":"From the reliability point of view, the uniqueness of path between any processor and memory module in a standard k-column Shuffle/Exchange (S/E) network is an inherent weakness. It is proposed to add a column of switches to the existing multistage S/E network such that the modified network, which will be called the S/E-Plus network, will retain the permuting power of the corresponding S/E network and have dual paths between any processor and any memory module. Fault tolerant routing algorithm is then designed to exploit the dual path structure of the S/E-Plus network. Various applications of the routing algorithm including a technique for performing permutation in the S/E-Plus network in which a fault exists are also discussed. Finally, the path reliability and the path reliability gain are defined to evaluate the S/E-Plus network.","PeriodicalId":184493,"journal":{"name":"ACM-SE 20","volume":"44 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1982-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"8","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"ACM-SE 20","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1145/503896.503912","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 8
Abstract
From the reliability point of view, the uniqueness of path between any processor and memory module in a standard k-column Shuffle/Exchange (S/E) network is an inherent weakness. It is proposed to add a column of switches to the existing multistage S/E network such that the modified network, which will be called the S/E-Plus network, will retain the permuting power of the corresponding S/E network and have dual paths between any processor and any memory module. Fault tolerant routing algorithm is then designed to exploit the dual path structure of the S/E-Plus network. Various applications of the routing algorithm including a technique for performing permutation in the S/E-Plus network in which a fault exists are also discussed. Finally, the path reliability and the path reliability gain are defined to evaluate the S/E-Plus network.