Integrated array of self electro-optic effect device logic gates

Abstract

Arrays of symmetric self electro-optic effect devices (S-SEEDs) have been made with low operating energies and fast switching speeds [1,2]. The device has the characteristics of a set-reset latch, although it can be made to do logic functions such as a NOR gate by presetting the state of the device before the application of the data inputs [3]. Logic gates that can perform more complex functions without preset beams may be realized by using electrically connected detectors configured like transistors in NMOS or CMOS circuits together with an output S-SEED to provide the output beams [4]. In this paper, we describe the first integrated arrays of these logic gates, each of which can perform the four basic logic functions without the use of preset beams. Each logic gate in the array consists of six quantum well p-i-n diodes, four input diodes configured similar to transistors in a CMOS NOR gate, and two output diodes (i. e. a S-SEED) that provide a set of complementary output beams. Like the S-SEEDs, this device has time sequential gain, in which the low power input beams set the state of the device and a set of equal higher power clock beams subsequently read the state. This device retains many desirable qualities of the S-SEED such as signal regeneration and retiming, wavefront restoration, and operation over several decades in power levels due to its differential nature. Because the logic gate contains only quantum well diodes, the same batch fabrication procedures [1] used for S-SEED arrays were used to make the arrays of these devices.