{"title":"Frequency scaling based energy efficient bengali unicode reader design for 28 nm and 40nm FPGA","authors":"A. Kaur, Sunny Singh, K. Ramkumar","doi":"10.1109/ISPCC.2017.8269682","DOIUrl":null,"url":null,"abstract":"Since the whole world is suffering from energy and power crises. So keeping this in mind an energy and power efficient device has been made in the following paper. An energy and power efficient Bengali Unicode Reader is a contribution towards green communication. After implementing the code on Xilinx software power efficient techniques such as frequency scaling and the FPGA technologies scaling techniques have been applied in order to get power efficient device. Static and dynamic powers of the device have been analyzed. It can be concluded that it is always better to operate the device on a lower frequency range of 10 MHz as compare to the higher frequency range of 1 THz. Also less amount of power is consumed by operating the device on a Artix-7 FPGA (28nm) technology instead of Virtex-6 FPGA (40nm) technology.","PeriodicalId":142166,"journal":{"name":"2017 4th International Conference on Signal Processing, Computing and Control (ISPCC)","volume":"35 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2017-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2017 4th International Conference on Signal Processing, Computing and Control (ISPCC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISPCC.2017.8269682","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
Since the whole world is suffering from energy and power crises. So keeping this in mind an energy and power efficient device has been made in the following paper. An energy and power efficient Bengali Unicode Reader is a contribution towards green communication. After implementing the code on Xilinx software power efficient techniques such as frequency scaling and the FPGA technologies scaling techniques have been applied in order to get power efficient device. Static and dynamic powers of the device have been analyzed. It can be concluded that it is always better to operate the device on a lower frequency range of 10 MHz as compare to the higher frequency range of 1 THz. Also less amount of power is consumed by operating the device on a Artix-7 FPGA (28nm) technology instead of Virtex-6 FPGA (40nm) technology.