{"title":"A Ku-Band High-Integrated CMOS Power Amplifier","authors":"Xiao Li, Wei Lv, Yongjie Li, Yan Wang, Siwei Huang, Zongming Duan","doi":"10.1109/ICICM50929.2020.9292263","DOIUrl":null,"url":null,"abstract":"In order to improve output power of Si-based transmitter, a Ku-band highly-integrated power amplifier is designed, fabricated and measured. The proposed amplifier adopts a two-stage common-source differential topology, and capacitor-neutralized technology is used both stages in order to enhance the stability and gain performance of amplifier by neutralizing the gate-drain parasitic capacitance. For improving the output power, the second-stage employ a two-way power-combining structure, and the transformer-based power combiner is designed according to the optimum impedance of power matching. The measured results indicate that the power amplifier achieve 26.8 dB gain, 17.4 dBm 1-dB-compressed output power, 22.6 dBm saturated output power and 30% peak power added efficiency at 15.5 GHz with 570 mW DC power consumption.","PeriodicalId":364285,"journal":{"name":"2020 IEEE 5th International Conference on Integrated Circuits and Microsystems (ICICM)","volume":"65 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2020-10-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2020 IEEE 5th International Conference on Integrated Circuits and Microsystems (ICICM)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICICM50929.2020.9292263","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
In order to improve output power of Si-based transmitter, a Ku-band highly-integrated power amplifier is designed, fabricated and measured. The proposed amplifier adopts a two-stage common-source differential topology, and capacitor-neutralized technology is used both stages in order to enhance the stability and gain performance of amplifier by neutralizing the gate-drain parasitic capacitance. For improving the output power, the second-stage employ a two-way power-combining structure, and the transformer-based power combiner is designed according to the optimum impedance of power matching. The measured results indicate that the power amplifier achieve 26.8 dB gain, 17.4 dBm 1-dB-compressed output power, 22.6 dBm saturated output power and 30% peak power added efficiency at 15.5 GHz with 570 mW DC power consumption.