Multialphabet arithmetic coding at 16 MBytes/sec

Abstract

The design and performance of a nonadaptive hardware system for data compression by arithmetic coding are presented. The alphabet of the data source is the full 256-symbol ASCII character set, plus a non-ASCII end-of-file symbol. The key ideas are the non-arithmetic representation of the current interval width, which yields improved coding efficiency in the interval width update, and the design of a circuit for the code point update, which operates at a high speed independent of the length of the code point register. On a reconfigurable coprocessor, constructed from commercially available field-programmable gate arrays and static RAM, implementation compresses its input stream at better than 16 MBytes/sec.<>